The present invention relates to an arrangement for imaging a useful signal from the frame of a first digital signal at a first bit rate in the frame of a second digital signal at a second bit rate by means of the pulse stuffing technique, with the bit rates of the first and second digital signals being greater than the bit rate of the useful signal. The invention also relates to a method of using such an arrangement.
If a given digital signal is to be transmitted at a bit rate other than its original bit rate, the pulse stuffing method is employed. Essentially two variations of pulse stuffing are known: positive stuffing and positive-zero-negative stuffing. In order to recover the original digital signal, the pulse stuffing process must be reversed again and the clock pulse frequency must be recovered. Usually the clock pulse frequency is smoothed only incompletely and is encumbered by a phase modulation, the waiting time jitter.
D. L. Duttweiler discloses, in an article entitled "Waiting Time Jitter" published in The Bell System Journal, Vol. 51, No. 1, 1972, pages 165-207, a synchronizer and a desynchronizer for positive stuffing. The desynchronizer includes an elastic memory into which a digital signal A is written and from which a digital signal D is read out. A write-in counter, which counts the bits of data of digital signal A that are written into the elastic memory, counts with the aid of the stuffing information in such a manner that it is a precise duplicate of the read-out counter in the synchronizer. The read-out counter which indicates when reading out of the elastic memory is taking place, receives its pulses from a voltage controlled oscillator. A phase comparator compares the phases of the write-in counter and the read-out counter to provide a measure of the phase difference between the two counters. The output of the comparator is filtered and fed to the voltage controlled oscillator. The desynchronizer thus operates like a phase locked loop circuit and smooths the gaps in the clock pulse of the digital signal produced by the stuffing bits. Analog phase locked loop circuit require a relatively large amount of space and power.
If a useful signal is to be stuffed over from the frame of a first digital signal into the frame of a second digital signal, the useful signal is initially recovered with the aid of a phase control loop. The recovered useful signal exhibits waiting time jitter. This recovered useful signal can then be mapped into the frame of the second digital signal.